中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
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CAS IR Grid
机构
计算技术研究所 [5]
软件研究所 [3]
自动化研究所 [2]
长春光学精密机械与物... [1]
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OAI收割 [11]
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期刊论文 [6]
会议论文 [5]
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2023 [2]
2022 [1]
2021 [1]
2019 [1]
2018 [2]
2011 [1]
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MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures
期刊论文
OAI收割
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 11, 页码: 4112-4125
作者:
Zhu, Zhenhua
;
Sun, Hanbo
;
Xie, Tongxin
;
Zhu, Yu
;
Dai, Guohao
  |  
收藏
  |  
浏览/下载:9/0
  |  
提交时间:2024/05/20
Computational modeling
Computer architecture
Integrated circuit modeling
Scheduling
Hardware
Memristors
Convolutional neural networks
Hardware modeling tool
processing-in-memory (PIM)
software-hardware co-optimization
Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses
期刊论文
OAI收割
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2023, 卷号: 28, 期号: 4, 页码: 23
作者:
Chu, Cheng
;
Liu, Cheng
;
Xu, Dawen
;
Wang, Ying
;
Luo, Tao
  |  
收藏
  |  
浏览/下载:16/0
  |  
提交时间:2023/12/04
Deformable convolution network
neural network accelerator
irregular memory access
runtime tile scheduling
An Application-oblivious Memory Scheduling System for DNN Accelerators
期刊论文
OAI收割
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2022, 卷号: 19, 期号: 4, 页码: 26
作者:
Li, Jiansong
;
Wang, Xueying
;
Chen, Xiaobing
;
Li, Guangli
;
Dong, Xiao
  |  
收藏
  |  
浏览/下载:21/0
  |  
提交时间:2023/07/12
Deep learning
memory scheduling
runtime system
DNN accelerators
Towards In-Network Compact Representation: Mergeable Counting Bloom Filter Vis Cuckoo Scheduling
期刊论文
OAI收割
IEEE ACCESS, 2021, 卷号: 9, 页码: 55329-55339
作者:
Liu, Wenjing
;
Xu, Zhiwei
;
Tian, Jie
;
Zhang, Yujun
  |  
收藏
  |  
浏览/下载:22/0
  |  
提交时间:2021/12/01
Arrays
Merging
Random access memory
Edge computing
Distributed databases
Schedules
Electronic mail
Edge computing
in-network data representation
compact representation
mergeable counting bloom filter
cuckoo-based bit array scheduling
Hierarchical Hybrid Memory Management in OS for Tiered Memory Systems
期刊论文
OAI收割
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2019, 卷号: 30, 期号: 10, 页码: 2223-2236
作者:
Liu, Lei
;
Yang, Shengjie
;
Peng, Lu
;
Li, Xinyu
  |  
收藏
  |  
浏览/下载:66/0
  |  
提交时间:2019/12/10
Memory
DRAM
NVM
operating system
scheduling
Traffic-Aware and Memory-Aware Task Scheduling on Multi-Core Chips
会议论文
OAI收割
Beijing,China, 2018,11.23-25
作者:
Hongyu,Meng
;
Yang,Guo
;
Zijun.Liu
;
Donglin.Wang
  |  
收藏
  |  
浏览/下载:27/0
  |  
提交时间:2019/05/06
Task Scheduling
Multi-core
Shared Memory
Traffic-aware
Memory-aware
A Design Space Exploration Method for on-Chip Memory System Based on Task Scheduling
会议论文
OAI收割
Beijing,China, 2018,11.23-25
作者:
Hongyu,Meng
;
Pengfei.Ding
;
Mingxuan.Wang
;
Donglin.Wang
  |  
收藏
  |  
浏览/下载:36/0
  |  
提交时间:2019/05/06
Design Space Exploration
Multi-core Architecture
Memory System
Task Scheduling
dacoop: accelerating data-iterative applications on map/reduce cluster
会议论文
OAI收割
2011 12th International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2011, Gwangju, Korea, Republic of, October 20, 2011 - October 22, 2011
Liang Yi
;
Li Guangrui
;
Wang Lei
;
Hu Yanpeng
  |  
收藏
  |  
浏览/下载:18/0
  |  
提交时间:2013/10/08
Cache memory
Cluster computing
Multitasking
Scheduling algorithms
Turnaround time
Real-time video compressing under DSP/BIOS (EI CONFERENCE)
会议论文
OAI收割
MIPPR 2009 - Medical Imaging, Parallel Processing of Images, and Optimization Techniques: 6th International Symposium on Multispectral Image Processing and Pattern Recognition, October 30, 2009 - November 1, 2009, Yichang, China
Chen Q.-P.
;
Li G.-J.
收藏
  |  
浏览/下载:21/0
  |  
提交时间:2013/03/25
This paper presents real-time MPEG-4 Simple Profile video compressing based on the DSP processor. The programming framework of video compressing is constructed using TMS320C6416 Microprocessor
the architecture level optimizations are used to improve software pipeline. The system used DSP/BIOS to realize multi-thread scheduling. The whole system realizes high speed transition of a great deal of data. Experimental results show the encoder can realize real-time encoding of 768*576
TDS510 simulator and PC. It uses embedded real-time operating system DSP/BIOS and the API functions to build periodic function
25 frame/s video images. 2009 Copyright SPIE - The International Society for Optical Engineering.
tasks and interruptions etcs. Realize real-time video compressing. To the questions of data transferring among the system. Based on the architecture of the C64x DSP
utilized double buffer switched and EDMA data transfer controller to transit data from external memory to internal
and realize data transition and processing at the same time
performance evaluation of multithreaded sparse matrix-vector multiplication using openmp
会议论文
OAI收割
11th IEEE International Conference on High Performance Computing and Communications, Seoul, SOUTH KOREA, JUN 25-27,
Liu Shengfei
;
Zhang Yunquan
;
Sun Xiangzheng
;
Qiu RongRong
  |  
收藏
  |  
浏览/下载:27/0
  |  
提交时间:2011/03/20
Dawning S4800A1
OpenMP
compute-to-memory ratio
irregular memory access patterns
iterative methods
multithreaded sparse matrix-vector multiplication
nonzero scheduling
performance evaluation
application program interfaces
matrix multiplication
multi-threading
scheduling
shared memory systems
software performance evaluation
sparse matrices
vectors