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	一种原子钟频率净化的环路最优带宽求解方法期刊论文 OAI收割时间频率学报, 2022, 卷号: 45, 期号: 4, 页码: 286 作者: 鄢然; 刘军良; 郑晓龙; 武建锋; 胡永辉 \| 收藏 \| 浏览/下载：12/0 \| 提交时间：2023/12/13 atomic clock clean-up phase locked loop(PLL) optimal bandwidth 原子钟频率净化锁相环最优带宽
	Study of Total-Ionizing-Dose Effects on a Single-Event-Hardened Phase-Locked Loop 期刊论文 OAI收割 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2018, 卷号: 65, 期号: 4, 页码: 997, 1004 作者: Chen, Zhuojun; Ding, Ding; Dong, Yemin; Shan, Yi; Zhou, Shuxing \| 收藏 \| 浏览/下载：54/0 \| 提交时间：2018/12/28 Phase-locked loop (PLL) phase noise reference spur total ionizing dose (TID)
	Study of Total-Ionizing-Dose Effects on a Single-Event-Hardened Phase-Locked Loop 期刊论文 OAI收割 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2018, 卷号: 65, 期号: 4, 页码: 997-1004 作者: Chen, ZJ (Chen, Zhuojun); Ding, D (Ding, Ding); Dong, YM (Dong, Yemin); Shan, Y (Shan, Yi); Zhou, SX (Zhou, Shuxing) \| 收藏 \| 浏览/下载：40/0 \| 提交时间：2018/05/07 Phase-locked Loop (Pll) Phase Noise Reference Spur Total Ionizing Dose (Tid)
	High precision test method for dynamic imaging of space camera (EI CONFERENCE) 会议论文 OAI收割 2010 IEEE International Conference on Advanced Computer Control, ICACC 2010, March 27, 2010 - March 29, 2010, 445 Hoes Lane - P.O.Box 1331, Piscataway, NJ 08855-1331, United States 作者: Jin L.-X.; Zhang K.; Zhang K.; Zhang K.; Zhang K. 收藏 \| 浏览/下载：26/0 \| 提交时间：2013/03/25 A test method for dynamic imaging of space TDICCD (Time Delay and Integration Charge Coupled Devices) camera was presented in this paper. The test method adopted the PLL (Phase Locked Loop) technology and CMAC (Cerebella Model Articulation Controller) friction compensation as control strategy. Furthermore According to this method a test system for dynamic imaging of space TDICCD camera was designed and implemented. The system simulated the movement of the ground objects relative to the space aerocraft to validate the capability of image speed match and the dynamic imaging quality of TDICCD camera. The design adopted a precision turntable and a drift turntable to simulate the movement around the earth and the drift motion in different latitude due to the rotation of earth of the aerocraft. The turntables were drived by permanent magnet torque motor which was powered by PWM (Pulse Width Modulation). The system adopted DSP (Digital Signal Processor) as the control core and reached a very high performance. The experimental results showed that the steady speed error was better than 0.01 % and the instantaneous speed error reached 0.0267%. The precision of the test system designed met the requirement for dynamic imaging of TDICCD camera. 2010 IEEE.
	A novel hybrid phase-locked-loop frequency synthesizer using single-electron devices and cmos transistors 期刊论文 iSwitch采集 Ieee transactions on circuits and systems i-regular papers, 2007, 卷号: 54, 期号: 11, 页码: 2516-2527 作者: Zhang, Wancheng; Wu, Nan-Han 收藏 \| 浏览/下载：54/0 \| 提交时间：2019/05/12 Frequency divider Phase-frequency detector (pfd) Phase-locked loop (pll) Single-electron transistor (set) Single-electron (se) turnstile
	A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit 期刊论文 iSwitch采集 Japanese journal of applied physics part 1-regular papers brief communications & review papers, 2006, 卷号: 45, 期号: 4b, 页码: 3290-3294 作者: Kuang, XF; Wu, NJ; Shou, GL 收藏 \| 浏览/下载：22/0 \| 提交时间：2019/05/12 Lock-in speed Direct frequency presetting Mixed-signal voltage-controlled oscillator (vco) Phase-locked loop (pll) Synthesizer
	A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit 期刊论文 OAI收割 japanese journal of applied physics part 1-regular papers brief communications & review papers, 2006, 卷号: 45, 期号: 4b, 页码: 3290-3294 Kuang XF; Wu NJ; Shou GL 收藏 \| 浏览/下载：70/0 \| 提交时间：2010/04/11 lock-in speed direct frequency presetting mixed-signal voltage-controlled oscillator (VCO) phase-locked loop (PLL) synthesizer LOW-NOISE CMOS