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浏览/检索结果: 共19条，第1-10条 帮助 条数/页： 5101520253035404550556065707580859095100 排序方式： 请选择题名升序题名降序提交时间升序提交时间降序作者升序作者降序发表日期升序发表日期降序 Hierarchical Controller Synthesis Under Linear Temporal Logic Specifications Using Dynamic Quantization 期刊论文  OAI收割 IEEE/CAA Journal of Automatica Sinica, 2024, 卷号: 11, 期号: 10, 页码: 2082-2098 作者:  Wei Ren;  Zhuo-Rui Pan;  Weiguo Xia;  Xi-Ming Sun   |  收藏  |  浏览/下载：2/0  |  提交时间：2024/09/03 Abstraction-based control design  dynamic quantization  formal methods  linear temporal logic (LTL)   A Machine Learning Approach for Optimization of Channel Geometry and Source/Drain Doping Profile of Stacked Nanosheet Transistors 期刊论文  OAI收割 IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 页码: 7 作者:  Xu, Haoqing;  Gan, Weizhuo;  Cao, Lei;  Yang, Cheng;  Wu, Jiahao   |  收藏  |  浏览/下载：51/0  |  提交时间：2022/12/07 Performance evaluation  Doping  Optimization  Geometry  Semiconductor process modeling  Training  Logic gates  Machine learning  multi-objective optimization (MOO)  nanosheet  technology computer-aided design (TCAD) simulation   Adaptive Neural Control of Nonlinear Nonstrict Feedback Systems With Full-State Constraints: A Novel Nonlinear Mapping Method 期刊论文  OAI收割 IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS, 2021, 页码: 9 作者:  Zhang, Jiaming;  Niu, Ben;  Wang, Ding;  Wang, Huanqing;  Duan, Peiyong   |  收藏  |  浏览/下载：27/0  |  提交时间：2022/01/27 Nonlinear systems  Artificial neural networks  Design methodology  Adaptive control  Time-varying systems  Fuzzy logic  Backstepping  Asymptotic tracking control  neural networks (NN)  nonlinear mapping (NM)  nonstrict feedback structure  time-varying full-state constraints  uncertain nonlinear system   Robust Adaptive Tracking Control for Hypersonic Vehicle Based on Interval Type-2 Fuzzy Logic System and Small-Gain Approach 期刊论文  OAI收割 IEEE TRANSACTIONS ON CYBERNETICS, 2021, 卷号: 51, 期号: 5, 页码: 2504-2517 作者:  Tao, Xinlong;  Yi, Jianqiang;  Pu, Zhiqiang;  Xiong, Tianyi   |  收藏  |  浏览/下载：50/0  |  提交时间：2021/06/07 Adaptation models  Aerodynamics  Adaptive systems  Fuzzy logic  Atmospheric modeling  Control design  Vehicle dynamics  Adaptive control  hypersonic vehicle  interval type-2 fuzzy logic system (IT2-FLS)  robust control  small-gain approach   A Guaranteed Secure Scan Design Based on Test Data Obfuscation by Cryptographic Hash 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4524-4536 作者:  Cui, Aijiao;  Li, Mengyang;  Qu, Gang;  Li, Huawei   |  收藏  |  浏览/下载：25/0  |  提交时间：2021/12/01 Ciphers  Encryption  Integrated circuits  Side-channel attacks  Testing  Cryptographic hash function  obfuscation logic  scan design  scan-based side-channel attack   Adaptive output-feedback finite-time stabilisation of stochastic non-linear systems with application to a two-stage chemical reactor 期刊论文  OAI收割 IET CONTROL THEORY AND APPLICATIONS, 2019, 卷号: 13, 期号: 4, 页码: 534-542 作者:  Sui, Shuai;  Chen, C. L. Philip   |  收藏  |  浏览/下载：95/0  |  提交时间：2019/07/12 chemical reactors  stochastic systems  control system synthesis  feedback  differential equations  adaptive control  uncertain systems  observers  stochastic processes  nonlinear control systems  stability  fuzzy control  control nonlinearities  probability  adaptive output-feedback finite-time stabilisation  two-stage chemical reactor  uncertain stochastic nonlinear system  unmeasured system variables  fuzzy logic systems  fuzzy state observer  stochastic differential equation  adaptive backstepping intelligent control  two-stage continuous stirred tank reactor process  controller design  single-input single-output system  SISO  probability   高性能数字信号处理器中动态电路设计的关键技术研究 学位论文  OAI收割 工学博士, 中国科学院自动化研究所: 中国科学院大学, 2015 作者:  林玻 收藏  |  浏览/下载：85/0  |  提交时间：2015/09/02 动态电路  多米诺逻辑  高性能处理器  建库  单边化  电路综合  逻辑单元库  推泡法  domino logic  dynamic circuits  Algebraic processor  high performance  design flow  cell library  synthesis  bubble pushing   enhanced symbolic simulation of a round-robin arbiter 会议论文  OAI收割 29th IEEE International Conference on Computer Design 2011, ICCD 2011, Amherst, MA, United states, November 9 Li Yongjian; Zeng Naiju; Hung William N. N.; Song Xiaoyu   |  收藏  |  浏览/下载：22/0  |  提交时间：2013/10/08 Asynchronous sequential logic  Computer simulation  Design  Hardware   Embedded system of time uniform based on DSP (EI CONFERENCE) 会议论文  OAI收割 2010 International Conference on Computer, Mechatronics, Control and Electronic Engineering, CMCE 2010, August 24, 2010 - August 26, 2010, Changchun, China 作者:  Li N.;  Liu C.-X. 收藏  |  浏览/下载：24/0  |  提交时间：2013/03/25 We introduced a design method of DSP-based System of time uniform  which combine the GPS and the Compass to calibrate the time. The system can use UTC (Coordinated Universal Time) of the GPS or the Compass for time base  to generate absolute time and different frequency of synchronous signals. We used DSP (Digital Signal Processor) to calculate the satellite information which includes the UTC time. After getting the UCT time information  put it into the CPLD (Complex Programmable Logic Device) for correction of time delay and serialization to output. Meanwhile  we divided 1PPS (one-pulse-per-second) signal of the GPS and the Compass into 20Hz  50Hz  and 800Hz synchronous signal. And we analyzed the precision of time and frequency. To conclude  the uncertainty of system absolute time is less than 100ns  the uncertainty of system synchronous signals is less than 20ns. This system is easy and flexible for use  stable and reliable in performance. 2010 IEEE.   The design of high-speed optical fiber communication system based on PCI bus (EI CONFERENCE) 会议论文  OAI收割 2010 2nd IEEE International Conference on Advanced Management Science, ICAMS 2010, July 9, 2010 - July 11, 2010, Chengdu, China 作者:  Zhang L.-G.;  Zhang L.-G.;  He X. 收藏  |  浏览/下载：55/0  |  提交时间：2013/03/25 In order to increase the transmission distance and reduce noise effectively  a communication system with the optical fiber interface is developed in this paper. In the system  the PCI bus is adopted as the connection bus between the underlying optical fiber transceiver module circuitry and host computer using the WDM driver. The FPGA is the core logic of the whole system  responsible for data transmission and timing logic control. The module structure and the design method of the PCI bus  the principle and the design of optical interface module and the bottom-driven development are described in this paper. The experiment results show that the system has basically meet requirement targets. It can achieve the maximum transfer rate of 40MBps when running in the DMA mode. With long transmission distance  strong antiinterference and high scalability  this system has stable and reliable performance. 2010 IEEE.