中国科学院机构知识库网格系统: 检索

浏览/检索结果: 共8条，第1-8条

帮助

条数/页：排序方式：
	Design of Wide-range and Multi-spectral TDI-CMOS Imaging System 会议论文 OAI收割 ELECTR NETWORK, 2022-11-24 作者: Yang, Yang; Bo, Zhu; Hong, Wang; Pei, Yao \| 收藏 \| 浏览/下载：19/0 \| 提交时间：2023/06/19 Wide-range FPGA Large-array sensor Multi-spectral
	RP-Ring: A Heterogeneous Multi-FPGA Accelerating Solution for N-Body Simulations 会议论文 OAI收割 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016, Washington, DC, United states, 2016-05-01 作者: Wang, Tianqi; Jin, Xi; Peng, Bo; Wang CJ(王传军); Zheng, Linlin 收藏 \| 浏览/下载：30/0 \| 提交时间：2017/01/10 Direct-summation N-body Multi-FPGA
	A real-time multi-scale 2-D Gaussian filter based on FPGA 会议论文 OAI收割 International Symposium on Optoelectronic Technology and Application 2014, Beijing, China, May 13-15, 2014 作者: Luo HB(罗海波); Gai XQ(盖兴琴); Chang Z(常铮); Hui B(惠斌) 收藏 \| 浏览/下载：28/0 \| 提交时间：2014/12/29 Multi-scale 2-D Gaussian filter Multi-scale 2-D convolution Real-time implementation Parallel pipeline In-place operation CAFIFO FPGA
	Real-Time Measurement of Detonation Transient Temperature 期刊论文 OAI收割 spectroscopy and spectral analysis, 2011, 卷号: 31, 期号: 11, 页码: 3060-3063 作者: Zheng Jin-kun; Bai Yong-lin; Wang Bo; Liu Bai-yu; Yang Wen-zheng 收藏 \| 浏览/下载：29/0 \| 提交时间：2012/06/29 Mechanics of explosion Detonation temperature FPGA High-speed linear CCD Multi-wavelength temperature measurement
	Designing and development of multi-DSP real-time image processing system based on FPGA (EI CONFERENCE) 会议论文 OAI收割 2011 International Conference on Computer Science and Network Technology, ICCSNT 2011, December 24, 2011 - December 26, 2011, Harbin, China Wei H. 收藏 \| 浏览/下载：20/0 \| 提交时间：2013/03/25 To improve the image processing system of resolution capability and reliability image processing system in a growing number of multi-sensor model. In this mode the use of the current main stream single DSP + FPGA hardware architecture for image processing algorithms have already unable to meet the operational requirements of real-time. This paper proposed a new hardware architecture that is the three DSPs based on FPGA. With the traditional master-slave architectures is different three DSP's external interfaces are connected with FPGA and other peripheral interfaces are connected to the FPGA. In the architecture DSP is in the same position three and FPGA flow control for data management and other function to achieve. This connection has a strong restructuring and expansion software development and more flexible. 2011 IEEE.
	Correction of the non-uniformity for multi-TDICCD mosaic camera on FPGA (EI CONFERENCE) 会议论文 OAI收割 2010 International Conference on E-Product E-Service and E-Entertainment, ICEEE2010, November 7, 2010 - November 9, 2010, Henan, China Zhu H.; Xue X.; Ma T.; Li H.; Si G.; Guo Y. 收藏 \| 浏览/下载：42/0 \| 提交时间：2013/03/25 To solve the non-uniformity problem of multi Time Delay Integral Charge Couple Device (TDICCD) mosaic camera several common non-uniformity correction methods are discussed. Secondly a non-uniformity correction algorithm is proposed and implemented on Field-Programmable Gate Array (FPGA) platform. Firstly the correction algorithm is designed. Finally the generation and definition of non-uniformity are introduced considering the fix-point processing ability of FPGA the correction algorithm is optimized properly and implemented on FPGA. The experimental results indicate that the non-uniformity can be decreased from 8.3%to 2.0% in 1s for 3-TDICCD mosaic camera's images with the proposed correction algorithm at 96TDI stage proving that this correction algorithm is of high real-time performance good practicality and satisfies the requirements of the target system. 2010 IEEE.
	Multi-channel high-speed TDICCD image data acquisition and storage system (EI CONFERENCE) 会议论文 OAI收割 2010 International Conference on E-Product E-Service and E-Entertainment, ICEEE2010, November 7, 2010 - November 9, 2010, Henan, China 作者: Li Y.; Li Y.; Li Y.; Li Y. 收藏 \| 浏览/下载：26/0 \| 提交时间：2013/03/25 For multi-channel high-speed image data of certain space remote sensing camera this paper proposed a new image data acquisition and storage system. First of all the system uses Field-Programmable Gate Array(FPGA) controlling synchronous dynamic random access memory(SDRAM) array to realize the cache of image data then according to the received commands sends certain channel's image data to the acquisition card to write the image data into SCSI hard disk and implements the final storage. A Time Delay Integral Charge Couple Device(TDICCD) image data acquisition and storage system with five channels is developed pixel clock rate is up to 96MHz total effective data rate is up to 2.88Gb/s single channel storage depth is up to 7810 lines. The experimental results indicate that this system work stably high effectively which can meet the requirement of acquisition and storage of multi-channel high-speed TDICCD image data. 2010 IEEE.
	Design of image interpretation and data-processing system based on SOPC (EI CONFERENCE) 会议论文 OAI收割 2010 International Conference on Computer, Mechatronics, Control and Electronic Engineering, CMCE 2010, August 24, 2010 - August 26, 2010, Changchun, China Wang Z.-Q.; Liu Z.-R.; Xie M.-J. 收藏 \| 浏览/下载：13/0 \| 提交时间：2013/03/25 In order to follow the development of image interpretation and data-processing system in photoelectric measurement equipments a kind of hardware acceleration system is designed where MIMD distributed multi-processor architecture is used with SOPC technology. System hardware is composed of FPGA SDRAM SRAM FLASH and PCI bridge chip. Four Nios II embedded processors are integrated in a single FPGA chip and communicate with each other by sharing memory. Experimental results indicate that the system meets the requirements of data-processing system in photoelectric measurement equipments and possesses practical significance for engineering applications. 2010 IEEE.