中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
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CAS IR Grid
机构
数学与系统科学研究院 [3]
软件研究所 [3]
计算技术研究所 [1]
半导体研究所 [1]
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OAI收割 [8]
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期刊论文 [5]
会议论文 [3]
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2011 [1]
2007 [1]
2006 [1]
2003 [2]
2002 [1]
2001 [1]
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学科主题
半导体物理 [1]
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A Programmable Vision Chip Based on Multiple Levels of Parallel Processors
期刊论文
OAI收割
ieee journal of solid-state circuits, IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2011, 2011, 卷号: 46, 46, 期号: 9, 页码: 2132-2147, 2132-2147
作者:
Zhang WC
;
Fu QY
;
Wu NJ
;
Zhang, WC (reprint author), Chinese Acad Sci, Inst Semicond, State Key Lab Superlattices & Microstruct, Beijing 100083, Peoples R China, nanjian@red.semi.ac.cn
  |  
收藏
  |  
浏览/下载:29/0
  |  
提交时间:2012/01/06
RECOGNITION SYSTEMS
FEATURE-EXTRACTION
IMAGE
SENSOR
ARCHITECTURE
DESIGN
ARRAY
VLSI
Recognition Systems
Feature-extraction
Image
Sensor
Architecture
Design
Array
Vlsi
lambda-OAT: lambda-geometry obstacle-avoiding tree construction with o (n log n) complexity
期刊论文
OAI收割
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2007, 卷号: 26, 期号: 11, 页码: 2073-2079
作者:
Jing, Tom Tong
;
Feng, Zhe
;
Hu, Yu
;
Hong, Xianlong L.
;
Hu, Xiaodong D.
  |  
收藏
  |  
浏览/下载:16/0
  |  
提交时间:2018/07/30
Index Terms-Physical design
routing
Steiner tree
very large scale
integration (VLSI).
Algorithmic and architectural co-design for integer motion estimation of AVS
期刊论文
OAI收割
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 2006, 卷号: 52, 期号: 3, 页码: 1092-1098
作者:
Sheng, Bin
;
Gao, Wen
;
Xie, Don
  |  
收藏
  |  
浏览/下载:21/0
  |  
提交时间:2019/12/16
motion estimation
AVS
VLSI
co-design
two-dimensional common-centroid stack generation algorithms for analog vlsi
会议论文
OAI收割
5th International Conference on ASIC, Beijing, PEOPLES R CHINA, OCT 21-24,
Liu R
;
Dong SQ
;
Hong XL
;
Long D
;
Gu J
  |  
收藏
  |  
浏览/下载:12/0
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提交时间:2011/07/29
analog VLSI design
mismatch minimization
parasitic control
stack generation algorithm
symmetric Eulerian graph
symmetric Eulerian trail
transistor insertion
two dimensional common centroid stacks
two dimensional symmetry
very large scale integrat
algorithms for analog vlsi 2d stack generation and block merging
会议论文
OAI收割
IEEE International Symposium on Circuits and Systems, BANGKOK, THAILAND, MAY 25-28,
Liu R
;
Dong SQ
;
Hong XL
;
Long D
;
Gu J
  |  
收藏
  |  
浏览/下载:17/0
  |  
提交时间:2011/07/29
2D stack generation
analog VLSI design algorithm
bi-axial symmetry
block merging
dummy transistor insertion
mismatch minimization
parasitic control
symmetric Eulerian graph
symmetric Eulerian trail
VLSI
analogue integrated circuits
circuit CAD
module placement with boundary constraints using o-tree representation
会议论文
OAI收割
IEEE International Symposium on Circuits and Systems, PHOENIX, AZ, MAY 26-29,
Liu R
;
Hong XL
;
Dong SQ
;
Cai YC
;
Gu J
;
Cheng CK
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收藏
  |  
浏览/下载:17/0
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提交时间:2011/07/29
I/O pad connection
O-tree representation
VLSI physical design
boundary constraints
chip boundary placement
layout generation
linear computation effort
module placement
polynomial methods
simulated annealing based algorithm
circuit optimisation
Approximations for Steiner trees with minimum number of Steiner points
期刊论文
OAI收割
THEORETICAL COMPUTER SCIENCE, 2001, 卷号: 262, 期号: 1-2, 页码: 83-99
作者:
Chen, DH
;
Du, DZ
;
Hu, XD
;
Lin, GH
;
Wang, LS
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收藏
  |  
浏览/下载:23/0
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提交时间:2018/07/30
Steiner trees
approximation algorithms
VLSI design
WDM optical networks
Steiner tree problem with minimum number of Steiner points and bounded edge-length
期刊论文
OAI收割
INFORMATION PROCESSING LETTERS, 1999, 卷号: 69, 期号: 2, 页码: 53-57
作者:
Lin, GH
;
Xue, GL
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收藏
  |  
浏览/下载:21/0
  |  
提交时间:2018/07/30
algorithms
approximation algorithms
Steiner minimum trees
VLSI design
WDM optimal networks
wireless communications