机构

• 长春光学精密机械与... [22]
• 计算技术研究所 [15]
• 自动化研究所 [3]
• 沈阳自动化研究所 [3]
• 西安光学精密机械研究... [2]
• 地理科学与资源研究所 [1]
• 更多

采集方式

• OAI收割 [53]

内容类型

• 会议论文 [31]
• 期刊论文 [21]
• 学位论文 [1]

发表日期

• 2026 [1]
• 2025 [6]
• 2024 [4]
• 2023 [3]
• 2022 [1]
• 2021 [1]
• 更多

学科主题

• 航空、航天::航天仪... [1]

筛选

浏览/检索结果: 共53条，第1-10条 帮助 条数/页： 5101520253035404550556065707580859095100 排序方式： 请选择发表日期升序发表日期降序题名升序题名降序提交时间升序提交时间降序作者升序作者降序 Chiplever: A Hardware-Software Co-Design Framework Toward Extension of Chiplet System for Fully Homomorphic Encryption 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2026, 卷号: 45, 期号: 2, 页码: 603-616 作者:  Du, Yibo;  Wang, Ying;  Wang, Mengdi   |  收藏  |  浏览/下载：0/0  |  提交时间：2026/05/25 Hardware  Chiplets  Homomorphic encryption  Polynomials  Vectors  Scheduling algorithms  Noise  Program processors  Design automation  Computational efficiency  Chiplet  fully homomorphic encryption (FHE)  hardware-software co-design  heterogeneous architecture   DFGAS: Exploring the Balance of HW-SW Scheduling through the DFG-Aware Scheme 期刊论文  OAI收割 ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2025, 卷号: 22, 期号: 4, 页码: 26 作者:  Liu, Tianyu;  Fan, Zhihua;  Li, Wenming;  Wang, Zhen;  Qiu, Yuhang   |  收藏  |  浏览/下载：1/0  |  提交时间：2026/05/25 CGRA  hardware-software co-design  network-on-chip   Compressing and Accelerating Sparse CNNs Using Sign-Reserved Toeplitz Filters and Input Activation Density-aware Dataflow 期刊论文  OAI收割 ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2025, 卷号: 22, 期号: 4, 页码: 23 作者:  Wang, Zhen;  Liu, Tianyu;  Fan, Zhihua;  Li, Wenming;  Qiu, Yuhang   |  收藏  |  浏览/下载：1/0  |  提交时间：2026/05/25 Convolutional neural networks  accelerators  sparsity  algorithm-hardware co-design   OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 10, 页码: 3830-3843 作者:  Ni, Liwei;  Wang, Rui;  Liu, Miao;  Meng, Xingyu;  Lin, Xiaoze   |  收藏  |  浏览/下载：1/0  |  提交时间：2025/12/03 Logic  Logic gates  Delays  Optimization  Machine learning  Hardware design languages  Boolean functions  Computer science  Benchmark testing  Wire  Adaptive  application  dataset  logic synthesis  machine learning (ML)   Re-Meltrix: A Reconfigurable Processing-in-Memory Architecture Based on RRAM and Function Synthesis 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3409-3422 作者:  Long, Boyu;  Han, Yinhe;  Sun, Xian-He;  Chen, Xiaoming   |  收藏  |  浏览/下载：0/0  |  提交时间：2025/12/03 Logic  Computer architecture  Integrated circuit interconnections  Hardware  Routing  Circuits  Table lookup  Decoding  Performance evaluation  Logic gates  Processing in memory  resistive random-access memory (RRAM)  software-hardware co-design  ternary content-addressable memory (TCAM)   SiHGNN: Leveraging Properties of Semantic Graphs for Efficient HGNN Acceleration 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3490-3503 作者:  Xue, Runzhen;  Yan, Mingyu;  Han, Dengke;  Xiao, Ziheng;  Tang, Zhimin   |  收藏  |  浏览/下载：0/0  |  提交时间：2025/12/03 Semantics  Layout  Graph neural networks  Optimization  Vectors  Graphics processing units  Feature extraction  Design automation  Training  Hardware acceleration  Graph neural network (GNN)  hardware accelerator  heterogeneous graph neural network (HGNN)  semantic graph   Oxpecker: Leaking Secrets via Fetch Target Queue 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 7, 页码: 2461-2474 作者:  Li, Shan;  Xu, Zheliang;  Shen, Haihua;  Li, Huawei   |  收藏  |  浏览/下载：0/0  |  提交时间：2025/12/03 Program processors  Prefetching  Security  Pipelines  Integrated circuits  Design automation  Prevention and mitigation  Manuals  Decoding  Optimization  Branch prediction unit (BPU)  fetch target queue (FTQ)  front-end  hardware security  instruction fetch unit  instruction prefetcher   Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators 期刊论文  OAI收割 IEEE DESIGN & TEST, 2024, 卷号: 41, 期号: 5, 页码: 46-54 作者:  Liu, Rui;  Li, Zerun;  Zhang, Xiaoyu;  Li, Wanqian;  Shen, Libo   |  收藏  |  浏览/下载：68/0  |  提交时间：2024/12/06 Computer architecture  Cryptography  Optimization  Table lookup  Hardware acceleration  Resource management  Space exploration  Computing-in-memory  electronic design automation  cryptographic algorithm  automatic generation   A Task-Adaptive In-Situ ReRAM Computing for Graph Convolutional Networks 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 9, 页码: 2635-2646 作者:  He, Yintao;  Li, Bing;  Wang, Ying;  Liu, Cheng;  Li, Huawei   |  收藏  |  浏览/下载：50/0  |  提交时间：2024/12/06 Task analysis  Sparse matrices  Convolution  Convolutional neural networks  Design automation  Neural networks  Integrated circuits  Graph convolutional network  hardware acceleration  processing-in-memory   Real-Time Robust Video Object Detection System Against Physical-World Adversarial Attacks 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 1, 页码: 366-379 作者:  Han, Husheng;  Hu, Xing;  Hao, Yifan;  Xu, Kaidi;  Dang, Pucheng   |  收藏  |  浏览/下载：61/0  |  提交时间：2024/05/20 Object detection  Streaming media  Optical flow  Feature extraction  Real-time systems  Task analysis  Detectors  Adversarial patch attack  deep learning security  domain-specific accelerator  hardware/software co-design  real time