机构

• 计算技术研究所 [7]
• 长春应用化学研究所 [5]
• 长春光学精密机械与物... [3]
• 上海应用物理研究所 [2]
• 沈阳自动化研究所 [2]
• 物理研究所 [1]
• 更多

采集方式

• OAI收割 [26]

内容类型

• 期刊论文 [22]
• 会议论文 [2]
• 外文期刊 [1]
• 学位论文 [1]

发表日期

• 2026 [1]
• 2025 [2]
• 2021 [1]
• 2020 [3]
• 2019 [2]
• 2018 [1]
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学科主题

• Pharmacolo... [1]
• Science & ... [1]
• 微电子学 [1]

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浏览/检索结果: 共26条，第1-10条 帮助 条数/页： 5101520253035404550556065707580859095100 排序方式： 请选择发表日期升序发表日期降序题名升序题名降序提交时间升序提交时间降序作者升序作者降序 JPnR: A Length-Matching Placement and Routing Framework for Single-Flux-Quantum Circuits 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTERS, 2026, 卷号: 75, 期号: 1, 页码: 290-304 作者:  Fu, Rongliang;  Zhou, Minglei;  Chen, Siyan;  Chen, Xinda;  Huang, Junying   |  收藏  |  浏览/下载：0/0  |  提交时间：2026/05/25 Logic gates  Routing  Circuits  Clocks  Physical design  Delays  Logic  Trees (botanical)  Switches  Layout  Superconducting electronics  single-flux-quantum  placement  routing  length-matching  clock-aware   Re-Meltrix: A Reconfigurable Processing-in-Memory Architecture Based on RRAM and Function Synthesis 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3409-3422 作者:  Long, Boyu;  Han, Yinhe;  Sun, Xian-He;  Chen, Xiaoming   |  收藏  |  浏览/下载：0/0  |  提交时间：2025/12/03 Logic  Computer architecture  Integrated circuit interconnections  Hardware  Routing  Circuits  Table lookup  Decoding  Performance evaluation  Logic gates  Processing in memory  resistive random-access memory (RRAM)  software-hardware co-design  ternary content-addressable memory (TCAM)   JSNPE: A Digital Superconducting Spiking Neural Processing Element 期刊论文  OAI收割 IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 2025, 卷号: 35, 期号: 4, 页码: 12 作者:  Jiang, Huilong;  Wang, Zhongqi;  Huang, Junying;  Chen, Gang;  Zhang, Zhimin   |  收藏  |  浏览/下载：2/0  |  提交时间：2025/12/03 Neurons  Synapses  Superconducting transmission lines  Superconducting logic circuits  Neuromorphics  Magnetic flux  Josephson junctions  SQUIDs  Membrane potentials  Logic  Josephson junction (JJ)  neuron  spiking neural network (SNN)  superconducting electronics  synapse   Measurement and Evaluation of the Within-Wafer TID Response Variability on BOX Layer of SOI Technology 期刊论文  OAI收割 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2021, 卷号: 68, 期号: 10, 页码: 2516-2523 作者:  Zheng, QW (Zheng, Qiwen) 1Cui, JW (Cui, Jiangwei) 1Yu, XF (Yu, Xuefeng) 1;  Li, YD (Li, Yudong) 1;  Lu, W (Lu, Wu) 1;  He, CF (He, Chengfa) 1;  Guo, Q (Guo, Qi) 1   |  收藏  |  浏览/下载：62/0  |  提交时间：2021/12/06 Threshold voltage  TestingMOSFET circuits  Transistors  Standards  Logic gates  Fluctuations  Buried oxide (BOX)  silicon-on-insulator (SOI)  total ionizing dose (TID)   A Guaranteed Secure Scan Design Based on Test Data Obfuscation by Cryptographic Hash 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4524-4536 作者:  Cui, Aijiao;  Li, Mengyang;  Qu, Gang;  Li, Huawei   |  收藏  |  浏览/下载：62/0  |  提交时间：2021/12/01 Ciphers  Encryption  Integrated circuits  Side-channel attacks  Testing  Cryptographic hash function  obfuscation logic  scan design  scan-based side-channel attack   Structured Decomposition for Reversible Boolean Functions 期刊论文  OAI收割 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2410-2421 作者:  Jiang, Jiaqing;  Sun, Xiaoming;  Sun, Yuan;  Wu, Kewen;  Xia, Zhiyu   |  收藏  |  浏览/下载：44/0  |  提交时间：2020/12/10 Integrated circuits  logic gates  quantum computation  reversible computation  reversible logic  synthesis method   Short Communication: An Updated Design to Implement Artificial Neuron Synaptic Behaviors in One Device with a Control Gate 期刊论文  OAI收割 INTERNATIONAL JOURNAL OF NANOMEDICINE, 2020, 卷号: 15, 页码: 6239-6245 作者:  Qi, Shaocheng;  Hu, Yongbin;  Dai, Chaoqi;  Chen, Peiqin;  Wu, Zhendong   |  收藏  |  浏览/下载：58/0  |  提交时间：2020/12/16 THIN-FILM TRANSISTORS  CIRCUITS  LOGIC   EDOA: an efficient delay optimization approach for mixed-polarity Reed-Muller logic circuits under the unit delay model 期刊论文  OAI收割 FRONTIERS OF COMPUTER SCIENCE, 2019, 卷号: 13, 期号: 5, 页码: 1102-1115 作者:  Ruan, Li;  He, Zhenxue;  Xiao, Limin;  Gu, Fei;  Huo, Zhisheng   |  收藏  |  浏览/下载：145/0  |  提交时间：2019/08/16 delay optimization  mixed-polarity Reed-Muller logic circuits  unit delay model  don't-care terms  Huffman tree construction algorithm   Programmable DNA Nanoindicator-Based Platform for Large-Scale Square Root Logic Biocomputing 期刊论文  OAI收割 Small, 2019, 卷号: 15, 期号: 49, 页码: 9 作者:  C.Y.Zhou;  H.M.Geng;  P.F.Wang;  C.L.Guo   |  收藏  |  浏览/下载：33/0  |  提交时间：2020/08/24 DNA hybridization,DNA switching,square root logic circuits,toehold,mediated reaction,enzyme-free,molecular logic,label-free,computation,operations,gates,circuit,system,half,Chemistry,Science & Technology - Other Topics,Materials Science,Physics   Logic Design of a 16-bit Bit-Slice Arithmetic Logic Unit for 32-/64-bit RSFQ Microprocessors 期刊论文  OAI收割 IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 2018, 卷号: 28, 期号: 4, 页码: 5 作者:  Tang, Guang-Ming;  Qu, Pei-Yao;  Ye, Xiao-Chun;  Fan, Dong-Rui   |  收藏  |  浏览/下载：66/0  |  提交时间：2019/12/10 Arithmetic logic unit (ALU)  microprocessor  rapid single-flux-quantum (RSFQ)  superconducting integrated circuits