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国家授时中心 [5]
长春光学精密机械与物... [4]
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Contribution of the FPGAs for Complex Control Algorithms: Sensorless DTFC with an EKF of an Induction Motor
期刊论文
OAI收割
International Journal of Automation and Computing, 2019, 卷号: 16, 期号: 2, 页码: 226-237
作者:
Saber Krim
;
Soufien Gdaim
;
Abdellatif Mtibaa
;
Mohamed Faouzi Mimouni
  |  
收藏
  |  
浏览/下载:34/0
  |  
提交时间:2021/02/22
Direct torque control
fuzzy logic control (FLC)
extended Kalman filter
Xilinx system generator (XSG)
field pro-grammable gate array (FPGA).
基于FPGA的星载电场仪信号处理系统
学位论文
OAI收割
硕士: 中国科学院研究生院, 2014
王林枫
收藏
  |  
浏览/下载:45/0
  |  
提交时间:2014/09/17
空间电场
星载电场仪
Xilinx FPGA
星上环境
主动式探测
LABTM control system based on FPGA (EI CONFERENCE)
会议论文
OAI收割
2nd International Conference on Mechatronics and Applied Mechanics, ICMAM 2012, December 8, 2012 - December 9, 2012, Taiwan
作者:
Wang Y.
;
Yu P.
;
Yu P.
;
Wang Y.
;
Wang Y.
收藏
  |  
浏览/下载:153/0
  |  
提交时间:2013/03/25
This paper presents the digital PI control method for design and simulation of a high precision limited angle brushless torque motor control system in Field Programmable Gate Array device (FPGA). The direct drive structures which are widely applied in many servo control fields. Matlab Xilinx System GeneratorR toolbox based on Fixed-Point Arithmetic is used to design the digital PI controller using DSP architecture
plot the responses of the control system and generate the VHDL source code. The control system model consists of a digital PI
a real LABTM
and a real absolute Inductosyn
encoder to rpm and position blocks. Through loading generated codes in process of the simulation that built by the digital discrete model
it is verified that the rising time of current loop is only 1.2ms
and rate loop is 8ms
overshoot is rarely 4.2%. Finally
the comprehensive positioning accuracy of system can reach up to 5 arc sec
and the rate jitter achieves 5% with the 4 arc sec accuracy absolute Inductosyn. (2013) Trans Tech Publications
Switzerland.
基于CMOS图像传感器的HDR图像采集技术研究
学位论文
OAI收割
硕士, 北京: 中国科学院研究生院, 2012
王华
收藏
  |  
浏览/下载:75/0
  |  
提交时间:2012/06/01
HDRI
xilinx FPGA
色彩复原
SDI
基于PCI;Express的高速光纤图像传输板卡的实现
期刊论文
OAI收割
半导体光电, 2012, 卷号: 33, 期号: 6, 页码: 886-890+895
作者:
刘坤
;
周维超
;
陈利杰
收藏
  |  
浏览/下载:20/0
  |  
提交时间:2016/11/01
PCI
Express
Xilinx
FPGA
WDM
基于FPIR系统的数字相关器的设计
学位论文
OAI收割
硕士: 中国科学院研究生院, 2011
兰舰
收藏
  |  
浏览/下载:46/0
  |  
提交时间:2014/07/03
综合孔径
微波辐射计
相关器
FPIR
FPGA
EMAC
Xilinx Modelsim
Timing generator of scientific grade CCD camera and its implementation based on FPGA technology (EI CONFERENCE)
会议论文
OAI收割
5th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optoelectronic Materials and Devices for Detector, Imager, Display, and Energy Conversion Technology, April 26, 2010 - April 29, 2010, Dalian, China
作者:
Li Y.
;
Li Y.
;
Li Y.
;
Li Y.
收藏
  |  
浏览/下载:32/0
  |  
提交时间:2013/03/25
The Timing Generator's functions of Scientific Grade CCD Camera is briefly presented: it generates various kinds of impulse sequence for the TDI-CCD
video processor and imaging data output
acting as the synchronous coordinator for time in the CCD imaging unit. The IL-E2TDI-CCD sensor produced by DALSA Co.Ltd. use in the Scientific Grade CCD Camera. Driving schedules of IL-E2 TDI-CCD sensor has been examined in detail
the timing generator has been designed for Scientific Grade CCD Camera. FPGA is chosen as the hardware design platform
schedule generator is described with VHDL. The designed generator has been successfully fulfilled function simulation with EDA software and fitted into XC2VP20-FF1152 (a kind of FPGA products made by XILINX). The experiments indicate that the new method improves the integrated level of the system. The Scientific Grade CCD camera system's high reliability
stability and low power supply are achieved. At the same time
the period of design and experiment is sharply shorted. 2010 Copyright SPIE - The International Society for Optical Engineering.
基于FPGA的小数分频法的研究与设计
会议论文
OAI收割
第十九届测控、计量、仪器仪表学术年会, 中国广西桂林, 2009
常兴旺
;
李孝辉
;
王玉兰
;
蔡成林
收藏
  |  
浏览/下载:13/0
  |  
提交时间:2012/10/19
FPGA
仿真
分频器
Verilog-HDL|Abstract
在数字逻辑电路设计中
分频器是一种基本电路。本文提出了一种分频系数为小数的分频器设计的方法
利用Verilog编程
在Xilinx7.1i平台上实现综合和仿真
并在开发板上得以实现。
Efficient WCDMA Digital Down Converter Design Using System Generator
会议论文
OAI收割
作者:
Lin Fei-yu
;
Qia Wei-ming
;
Wang Yan-yu
;
Liu Tai-lian
;
Fan Jin
  |  
收藏
  |  
浏览/下载:38/0
  |  
提交时间:2018/08/20
Digital Down Converter (DDC)
Field-programmable Gate Array (FPGA)
Wideband Code Division Multiple Access (WCDMA)
Xilinx System Generator